Cortex M4 Arm Developer
The target processor's "instruction set" is the set of capabilities that the core knows how to execute The LPC chips are grouped into related series that are based around the same 32bit ARM processor core, such as the CortexM4F, CortexM3, CortexM0, or CortexM0 Internally, each microcontroller consists of the processor core, staticCortexM4 Cortex M3 Total 60k* Gates ARMv7EM Architecture Thumb2 only DSP extensions Optional FPU (CortexM4F) Otherwise, same as CortexM3 Implements full Thumb2 instruction set Saturated math (eg QADD) Packing and unpacking (eg UXTB) Signed multiply (eg SMULTB) SIMD (eg ADD8)
